The β of the transistor must therefore be about 200. The 50uA curve happens to cross the load line at I C =10mA. In the NPN example each curve represents a different I B from 10uA to 100uA in 10uA steps. The I D equal to 10mA point on the load line falls between the 1.4V and 1.3V curves or a V GS of 1.32V. The NMOS device used in this example has a transconductance of about 40mA/ V. In the NMOS example each curve represents a different V GS from 0.9 volts to 1.5 volts in 0.1 volt steps. The next step is to determine the corresponding V GS or I B for a 10mA I D or I C. This is around 10mA for R L equal to 400 ohms. Finding the corresponding drain or collector current along the load line gives us the target current level. To maximize the output swing it is desirable to set the operating point of the transistor, with a zero input signal, at a drain or collector voltage of one half the supply voltage, which would be 4 volts in this case. The red line superimposed on the two sets of curves represents the DC load line of a 400 ohm R L. the BJT at equal current levels leads to lower voltage gain for the MOS version.ĩ.2.1 DC Bias techniques, common emitter/sourceįigure 9.2.1 (a) I D vs. In comparison to the BJT common emitter amplifier, the FET common source amplifier has higher input impedance. This latter combination is called a cascode amplifier as we will see later in the chapter on multi-stage amplifiers. Therefore, in practice the output often is routed through either a voltage follower (common collector or drain stage), or a current follower (common base or gate stage), to obtain more favorable output and frequency characteristics. More on how this capacitance effects the frequency response in a later section of this chapter. Another major drawback is the amplifier’s limited high-frequency response due in part to the built in collector base or drain gate capacitance inherent to the transistor. Nor is the output load, R L, low enough for a decent voltage amplifier (ideally zero). However, the transistor’s small signal output resistance, r o, is not typically high enough for a reasonable transconductance amplifier (ideally infinite). By passing this varying current through the output load resistance, R L it will be converted back into a voltage V out. As a transconductance amplifier, the small signal input voltage, v be for a BJT or v gs for a FET, times the device transconductance g m, modulates the amount of current flowing through the transistor, i c or i d. voltage in, current out) or as a voltage amplifier (voltage in, voltage out). The common emitter or source amplifier may be viewed as a transconductance amplifier ( i.e. When larger multi-stage amplifiers are assembled, both types of transistors are often interspersed with each other.įigure 9.2: Basic n-type inverting voltage amplifier circuit (neglecting biasing details) The same basic amplifier stages can just as easily be implemented using p-type transistors (PNP, PMOS). In this chapter we will primarily be using n-type transistors (NPN, NMOS) in the example circuits. The remaining terminal is what is thus common to both input and output. The easiest way to determine if a device is connected as common emitter/source, common collector/drain, or common base/gate is to examine where the input signal enters and the output signal leaves. This leads to the names common emitter, etc. This means one of the transistor terminals must be common to both the input and output circuits. Representing the basic amplifier as a two port network as in figure 9.1, there would need to be two input and two output terminals for a total of four. The transistor, as we have seen in the previous chapter, is a three-terminal device.
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